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Online Resumes with "Sub micron"
Relaxed but focused professional who coaxes collaborative efforts among peers; trains and advises new technicians and aspiring engineers
contract mask design doing analog /RF or digital layouts
Work on the challenging issues of UDSM (Ultra Deep Sub Micron) Physical Design in SoC environment.
Larry High 2217 W. Catalina Ave Mesa, Arizona, 85202 H (480) 969-3117 C (480) 229-8148 Email: email@example.com OBJECTIVE My objective is to contribute and grow in a competitive environment with highly motivated and talented people. I have over 28 years of experience in the field of Layout Design. I have worked with Analog, Digital and RF. I have also worked ...
To become an accomplished front-end VLSI engineer with deep expertise in micro-architecture, design and verification of SoCs (System on Chip) and develop a broad technical background in DSM (Deep Sub-Micron) VLSI methodologies.
Seasoned equipment engineering professional with over 35 years of sub-micron wafer fab experience, striving to continuously improve production availability through Best Known Methods (BKM) programs focused on reducing MTTR (Meantime Time To Repair) and increasing MTBF (Mean Time Before Failure). Broad and deep understanding of process and equipment control systems; OEE (Overall Equipment Efficiency); Layout and installation...
Seeking an IC/CAD/SoC physical design engineering position QUALIFICATION * 16-year experiences in high-speed, low-power, billion-transistor, deep sub-micron CPU design * 3-yearexperience in sophisticated SoC design * Taped out 7 Intel CPU chips and 2 Broadcom communication chips
Tags for this Online Resume: Intel Co., Noise, Perl Programming Language, Sub-micron, Automation, Layout, Reliability, CAD flow, EDA tools, System engineering, synthesis, IRdrop/EM/ESD, STA, PnR, RC Extraction, CTS, Low power
Summary I started with the StorageTek Recording Head Group in 1993, as a Cleanroom Operator. In order to improve my skills, I began taking courses at the University of Colorado. I was promoted to a Line Trainer and, a year later, I was hired as an Engineering Technician. While working full time, I earned a Bachelor Degree in Physics, with an interdisciplinary focus in Mathematical Statistics. Shortly after my graduation, I ...
Summary Principal ASIC Design Engineer with more than 20+ years ASIC design and verification experience including completion of more than 10 project cycles from concept through successful first-pass production release of silicon. Experience includes all aspects of ASIC design and verification, including writing micro-architecture specifications, Block Level and Subsystem design and verification, Timing closure, FPGA design ...